View MC34163-D_2957964.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

? semiconductor components industries, llc, 2002 january, 2002 rev. 4 1 publication order number: mc34163/d mc34163, mc33163 3.4 a, step-up/down/ inverting switching regulators the mc34163 series are monolithic power switching regulators that contain the primary functions required for dctodc converters. this series is specifically designed to be incorporated in stepup, stepdown, and voltageinverting applications with a minimum number of external components. these devices consist of two high gain voltage feedback comparators, temperature compensated reference, controlled duty cycle oscillator, driver with bootstrap capability for increased efficiency, and a high current output switch. protective features consist of cyclebycycle current limiting, and internal thermal shutdown. also included is a low voltage indicator output designed to interface with microprocessor based systems. these devices are contained in a 16 pin dualinline heat tab plastic package for improved thermal conduction. ? output switch current in excess of 3.0 a ? operation from 2.5 v to 40 v input ? low standby current ? precision 2% reference ? controlled duty cycle oscillator ? driver with bootstrap capability for increased efficiency ? cyclebycycle current limiting ? internal thermal shutdown protection ? low voltage indicator output for direct microprocessor interface ? heat tab power package ? moisture sensitivity level (msl) equals 1 16 9 10 11 12 13 14 15 8 7 6 5 4 3 2 control logic and thermal shutdown lvi osc + + - voltage feedback 2 voltage feedback 1 gnd timing capacitor v cc i pk sense bootstrap input switch emitter gnd switch collector driver collector + + + i limit vfb figure 1. representative block diagram (bottom view) - + + + - 1 lvi output this device contains 114 active transistors. device package shipping ordering information mc33163dw so16w 47 units/rail mc33163p pdip16 mc34163dw so16w http://onsemi.com 25 units/rail 47 units/rail mc34163dwr2 so16w 1000 tape & reel mc33163dwr2 so16w 1000 tape & reel mc34163p pdip16 25 units/rail marking diagrams x = 3 or 4 a = assembly location wl = wafer lot yy = year ww = work week 1 16 pdip16 p suffix case 648c 1 16 so16w dw suffix case 751g 1 16 mc3x163dw awlyyww 1 16 116 15 14 13 12 11 10 9 2 3 4 5 6 7 8 (top view) lvi output voltage feedback 2 voltage feedback 1 gnd timing capacitor v cc i pk sense bootstrap input switch emitter gnd switch collector driver collector pin connections mc3x163p awlyyww
mc34163, mc33163 http://onsemi.com 2 maximum ratings (note 1) rating symbol value unit power supply voltage v cc 40 v switch collector voltage range v c(switch) 1.0 to + 40 v switch emitter voltage range v e(switch) 2.0 to v c(switch) v switch collector to emitter voltage v ce(switch) 40 v switch current (note 2) i sw 3.4 a driver collector voltage v c(driver) 1.0 to +40 v driver collector current i c(driver) 150 ma bootstrap input current range (note 2) i bs 100 to +100 ma current sense input voltage range v ipk (sense) (v cc 7.0) to (v cc +1.0) v feedback and timing capacitor input voltage range v in 1.0 to + 7.0 v low voltage indicator output voltage range v c(lvi) 1.0 to + 40 v low voltage indicator output sink current i c(lvi) 10 ma thermal characteristics p suffix, dualinline case 648c thermal resistance, junctiontoair thermal resistance, junctiontocase (pins 4, 5, 12, 13) dw suffix, surface mount case 751g thermal resistance, junctiontoair thermal resistance, junctiontocase (pins 4, 5, 12, 13) r q ja r q jc r q ja r q jc 80 15 94 18 c/w operating junction temperature t j +150 c operating ambient temperature (note 4) mc34163 mc33163 t a 0 to +70 40 to + 85 c storage temperature range t stg 65 to +150 c electrical characteristics (v cc = 15 v, pin 16 = v cc , c t = 620 pf, for typical values t a = 25 c, for min/max values t a is the operating ambient temperature range that applies (note 4), unless otherwise noted.) characteristic symbol min typ max unit oscillator frequency t a = 25 c total variation over v cc = 2.5 v to 40 v, and temperature f osc 46 45 50 54 55 khz charge current i chg 225 m a discharge current i dischg 25 m a charge to discharge current ratio i chg /i dischg 8.0 9.0 10 sawtooth peak voltage v osc(p) 1.25 v sawtooth valley voltage v osc(v) 0.55 v feedback comparator 1 threshold voltage t a = 25 c line regulation (v cc = 2.5 v to 40 v, t a = 25 c) total variation over line, and temperature v th(fb1) 4.9 4.85 5.05 0.008 5.2 0.03 5.25 v %/v v input bias current (v fb1 = 5.05 v) i ib(fb1) 100 200 m a 1. this device series contains esd protection and exceeds the following tests: human body model 1500 v per milstd883, method 3015. machine model method 150 v. 2. maximum package power dissipation limits must be observed. 3. low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 4. t low =0 c for mc34163 t high =+70 c for mc34163 =40 c for mc33163 = + 85 c for mc33163
mc34163, mc33163 http://onsemi.com 3 electrical characteristics (continued) (v cc = 15 v, pin 16 = v cc , c t = 620 pf, for typical values t a = 25 c, for min/max values t a is the operating ambient temperature range that applies (note 6), unless otherwise noted.) characteristic symbol min typ max unit feedback comparator 2 threshold voltage t a = 25 c line regulation (v cc = 2.5 v to 40 v, t a = 25 c) total variation over line, and temperature v th(fb2) 1.225 1.213 1.25 0.008 1.275 0.03 1.287 v %/v v input bias current (v fb2 = 1.25 v) i ib(fb2) 0.4 0 0.4 m a current limit comparator threshold voltage t a = 25 c total variation over v cc = 2.5 v to 40 v, and temperature v th(ipk sense) 230 250 270 mv input bias current (v ipk (sense) = 15 v) i ib(sense) 1.0 20 m a driver and output switch (note 5) sink saturation voltage (i sw = 2.5 a, pins 14, 15 grounded) nondarlington connection (r pin 9 = 110 w to v cc , i sw /i drv 20) darlington connection (pins 9, 10, 11 connected) v ce(sat) 0.6 1.0 1.0 1.4 v collector offstate leakage current (v ce = 40 v) i c(off) 0.02 100 m a bootstrap input current source (v bs = v cc + 5.0 v) i source(drv) 0.5 2.0 4.0 ma bootstrap input zener clamp voltage (i z = 25 ma) v z v cc + 6.0 v cc + 7.0 v cc + 9.0 v low voltage indicator input threshold (v fb2 increasing) v th 1.07 1.125 1.18 v input hysteresis (v fb2 decreasing) v h 15 mv output sink saturation voltage (i sink = 2.0 ma) v ol(lvi) 0.15 0.4 v output offstate leakage current (v oh = 15 v) i oh 0.01 5.0 m a total device standby supply current (v cc = 2.5 v to 40 v, pin 8 = v cc , pins 6, 14, 15 = gnd, remaining pins open) i cc 6.0 10 ma 5. low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 6. t low =0 c for mc34163 t high =+70 c for mc34163 =40 c for mc33163 = + 85 c for mc33163 , output switch on-off time ( s) t on -t m 100 c t , oscillator timing capacitor (nf) 0.1 10 1.0 1.0 10 off figure 2. output switch onoff time versus oscillator timing capacitor figure 3. oscillator frequency change versus temperature 2.0 -55 t a , ambient temperature ( c) f osc , oscillator frequency change (%) d 0 -2.0 -4.0 -6.0 -25 0 25 50 75 100 125 1 2 3 4 5 v cc = 15 v c t = 620 pf v cc = 15 v t a = 25 c 1)t on , r dt = 2)t on , r dt = 20 k 3)t on , t off , r dt = 10 k 4)t off , r dt = 20 k 5)t off , r dt =
mc34163, mc33163 http://onsemi.com 4 figure 4. feedback comparator 1 input bias current versus temperature 2.8 2.4 2.0 1.6 1.2 -55 -25 0 25 50 75 100 125 t a , ambient temperature ( c) i source (drv) , bootstrap input current source (ma) v cc = 15 v pin 16 = v cc + 5.0 v v z figure 5. feedback comparator 2 threshold voltage versus temperature 7.6 7.4 7.2 7.0 6.8 -55 -25 0 25 50 75 100 12 5 t a , ambient temperature ( c) i z = 25 ma , bootstrap input zener clamp voltage (v) v ce (sat) figure 6. bootstrap input current source versus temperature 0 -0.4 0 0.8 2.4 3.2 i e , emitter current (a) , source saturation (v) -0.8 -1.2 -1.6 -2.0 figure 7. bootstrap input zener clamp voltage versus temperature 1.2 1.0 i c , collector current (a) 0.8 0.6 0.4 0.2 0 gnd i ib , input bias current (a) m 140 -55 t a , ambient temperature ( c) 120 100 80 60 -25 0 25 50 75 100 125 v ce (sat) , sink saturation (v) v th(fb2) , comparator 2 threshold voltage (mv ) 1300 1280 1260 1240 1220 1200 -55 t a , ambient temperature ( c) -25 0 25 50 75 100 125 v th typ = 1250 mv v th min = 1225 mv v cc = 15 v v fb1 = 5.05 v v th max = 1275 mv 1.6 bootstrapped, pin 16 = v cc + 5.0 v non-bootstrapped, pin 16 = v cc v cc 0 0.8 2.4 3.2 1.6 figure 8. output switch source saturation versus emitter current figure 9. output switch sink saturation versus collector current darlington, pins 9, 10, 11 connected grounded emitter configuration collector sinking current from v cc pins 7, 8 = v cc = 15 v pins 4, 5, 12, 13, 14, 15 = gnd t a = 25 c, (note 2) saturated switch, r pin9 = 110 w to v cc v cc = 15 v darlington configuration emitter sourcing current to gnd pins 7, 8, 10, 11 = v cc pins 4, 5, 12, 13 = gnd t a = 25 c, (note 2)
mc34163, mc33163 http://onsemi.com 5 i cc , supply current (ma) figure 10. output switch negative emitter voltage versus temperature figure 11. low voltage indicator output sink saturation voltage versus sink current figure 12. current limit comparator threshold voltage versus temperature figure 13. current limit comparator input bias current versus temperature v th (ipk sense) , threshold voltage (mv) figure 14. standby supply current versus supply voltage 254 252 250 248 246 -55 -25 0 25 50 75 100 125 t a , ambient temperature ( c) i ib (sense) input bias current ( a) figure 15. standby supply current versus temperature 1.6 1.4 1.2 1.0 0.8 -55 -25 0 25 50 75 100 125 t a , ambient temperature ( c) m 0.6 i cc , supply current (ma) 8.0 6.0 4.0 2.0 0 0 10203040 v cc , supply voltage (v) pins 7, 8, 16 = v cc pins 4, 6, 14 = gnd remaining pins open t a = 25 c 7.2 6.4 5.6 4.8 -55 -25 0 25 50 75 100 125 t a , ambient temperature ( c) 4.0 v cc = 15 v pins 7, 8, 16 = v cc pins 4, 6, 14 = gnd remaining pins open v e , emitter voltage (v) 0 -0.4 -0.8 -1.2 -1.6 -2.0 -55 -25 0 25 50 75 100 125 t a , ambient temperature ( c) i c = 10 ma v ol (lvi) , output saturation voltage (v) 0.5 0.4 0 2.0 4.0 6.0 8.0 i sink , output sink current (ma) 0.3 0.2 0.1 0 v cc =5 v t a =25 c gnd , v cc = 15 v v cc = 15 v v ipk (sense) = 15 v i c = 10 m a v cc = 15 v pins 7, 8, 9, 10, 16 = v cc pins 4, 6 = gnd pin 14 driven negative
mc34163, mc33163 http://onsemi.com 6 0 0 figure 16. minimum operating supply voltage versus temperature 3.0 2.6 2.2 1.8 1.4 1.0 -55 -25 0 25 50 75 100 125 t a , ambient temperature ( c) v cc(min) , minimum operating supply voltage (v) pin 16 open c t = 620 pf pins 7,8 = v cc pins 4, 14 = gnd pin 9 = 1.0 k w to 15 v pin 10 = 100 w to 15 v figure 17. p suffix (dip16) thermal resistance and maximum power dissipation versus p.c.b. copper length ??? ??? ??? graphs represent symmetrical layout 3.0 mm printed circuit board heatsink example l l 100 80 60 40 20 10 20 30 40 50 l, length of copper (mm) p d , maximum power dissipation (w) 5.0 4.0 3.0 2.0 1.0 0 p d(max) for t a = 70 c 2.0 oz copper ?? ?? ?? pin 16 = v cc r q ja r , thermal resistance ja q junction-to-air ( c/w) figure 18. dw suffix (sop16l) thermal resistance and maximum power dissipation versus p.c.b. copper length 30 40 50 60 70 80 90 0 0.4 0.8 1.2 1.6 2.0 2.4 0203050 40 10 l, length of copper (mm) 100 2.8 p d(max) for t a = 50 c r q ja p d r , thermal resistance ja q junction-to-air ( c/w) , maximum power dissipation (w) ??? ??? ??? ??? ?? ?? ?? 2.0 oz. copper graph represents symmetrical layout 3.0 mm l l
mc34163, mc33163 http://onsemi.com 7 - feedback comparator r s q lvi 1 + + + current limit 8 7 6 5 4 3 2 (bottom view) - + 16 9 10 12 13 14 15 0.25 v + i pk sense r sc v cc timing capacitor shutdown c t gnd r dt voltage feedback 1 voltage feedback 2 lvi output 1.125 v 15 k 1.25 v + 45 k thermal oscillator latch q 2 60 2.0 ma 7.0 v bootstrap input switch emitter gnd switch collector driver collector + sink only positive true logic = figure 19. representative block diagram + + + - + + - 11 q 1 comparator output timing capacitor c t oscillator output output switch output voltage nominal output voltage level 1 0 1.25 v 0.55 v 1 0 on off figure 20. typical operating waveforms startup quiescent operation 9t t
mc34163, mc33163 http://onsemi.com 8 introduction the mc34163 series are monolithic power switching regulators optimized for dctodc converter applications. the combination of features in this series enables the system designer to directly implement stepup, stepdown, and voltageinverting converters with a minimum number of external components. potential applications include cost sensitive consumer products as well as equipment for the automotive, computer, and industrial markets. a representative block diagram is shown in figure 19. operating description the mc34163 operates as a fixed ontime, variable offtime voltage mode ripple regulator. in general, this mode of operation is somewhat analogous to a capacitor charge pump and does not require dominant pole loop compensation for converter stability. the t ypical operating waveforms are shown in figure 20. the output voltage waveform shown is for a stepdown converter with the ripple and phasing exaggerated for clarity. during initial converter startup, the feedback comparator senses that the output voltage level is below nominal. this causes the output switch to turn on and off at a frequency and duty cycle controlled by the oscillator, thus pumping up the output filter capacitor. when the output voltage level reaches nominal, the feedback comparator sets the latch, immediately terminating switch conduction. the feedback comparator will inhibit the switch until the load current causes the output voltage to fall below nominal. under these conditions, output switch conduction can be inhibited for a partial oscillator cycle, a partial cycle plus a complete cycle, multiple cycles, or a partial cycle plus multiple cycles. oscillator the oscillator frequency and ontime of the output switch are programmed by the value selected for timing capacitor c t . capacitor c t is charged and discharged by a 9 to 1 ratio internal current source and sink, generating a negative going sawtooth waveform at pin 6. as c t charges, an internal pulse is generated at the oscillator output. this pulse is connected to the nor gate center input, preventing output switch conduction, and to the and gate upper input, allowing the latch to be reset if the comparator output is low. thus, the output switch is always disabled during rampup and can be enabled by the comparator output only at the start of rampdown. the oscillator peak and valley thresholds are 1.25 v and 0.55 v, respectively, with a charge current of 225 m a and a discharge current of 25 m a, yielding a maximum ontime duty cycle of 90%. a reduction of the maximum duty cycle may be required for specific converter configurations. this can be accomplished with the addition of an external deadtime resistor (r dt ) placed across c t . the resistor increases the discharge current which reduces the ontime of the output switch. a graph of the output switch onoff time versus oscillator timing capacitance for various values of r dt is shown in figure 2. note that the maximum output duty cycle, t on /t on + t off , remains constant for values of c t greater than 0.2 nf. the converter output can be inhibited by clamping c t to ground with an external npn smallsignal transistor. feedback and low voltage indicator comparators output voltage control is established by the feedback comparator. the inverting input is internally biased at 1.25 v and is not pinned out. the converter output voltage is typically divided down with two external resistors and monitored by the high impedance noninverting input at pin 2. the maximum input bias current is 0.4 m a, which can cause an output voltage error that is equal to the product of the input bias current and the upper divider resistance value. for applications that require 5.0 v, the converter output can be directly connected to the noninverting input at pin 3. the high impedance input, pin 2, must be grounded to prevent noise pickup. the internal resistor divider is set for a nominal voltage of 5.05 v. the additional 50 mv compensates for a 1.0% voltage drop in the cable and connector from the converter output to the load. the feedback comparator's output state is controlled by the highest voltage applied to either of the two noninverting inputs. the low voltage indicator (lvi) comparator is designed for use as a reset controller in microprocessorbased systems. the inverting input is internally biased at 1.125 v, which sets the noninverting input thresholds to 90% of nominal. the lvi comparator has 15 mv of hysteresis to prevent erratic reset operation. the open collector output is capable of sinking in excess of 6.0 ma (see figure 11). an external resistor (r lvi ) and capacitor (c dly ) can be used to program a reset delay time (t dly ) by the formula shown below, where v th(mpu) is the microprocessor reset input threshold. refer to figure 21. t dly = r lvi c dly in 1 1 v th(mpu) v out current limit comparator, latch and thermal shutdown with a voltage mode ripple converter operating under normal conditions, output switch conduction is initiated by the oscillator and terminated by the voltage feedback comparator. abnormal operating conditions occur when the converter output is overloaded or when feedback voltage sensing is lost. under these conditions, the current limit comparator will protect the output switch.
mc34163, mc33163 http://onsemi.com 9 the switch current is converted to a voltage by inserting a fractional ohm resistor, r sc , in series with v cc and output switch transistor q 2 . the voltage drop across r sc is monitored by the current sense comparator. if the voltage drop exceeds 250 mv with respect to v cc , the comparator will set the latch and terminate output switch conduction on a cyclebycycle basis. this comparator/latch configuration ensures that the output switch has only a single ontime during a given oscillator cycle. the calculation for a value of r sc is: r sc 0.25 v i pk (switch) figures 12 and 13 show that the current sense comparator threshold is tightly controlled over temperature and has a typical input bias current of 1.0 m a. the propagation delay from the comparator input to the output switch is typically 200 ns. the parasitic inductance associated with r sc and the circuit layout should be minimized. this will prevent unwanted voltage spikes that may falsely trip the current limit comparator. internal thermal shutdown circuitry is provided to protect the ic in the event that the maximum junction temperature is exceeded. when activated, typically at 170 c, the latch is forced into the aseto state, disabling the output switch. this feature is provided to prevent catastrophic failures from accidental device overheating. it is not intended to be used as a replacement for proper heatsinking. driver and output switch to aid in system design flexibility and conversion efficiency, the driver current source and collector, and output switch collector and emitter are pinned out separately. this allows the designer the option of driving the output switch into saturation with a selected force gain or driving it near saturation when connected as a darlington. the output switch has a typical current gain of 70 at 2.5 a and is designed to switch a maximum of 40 v collector to emitter, with up to 3.4 a peak collector current. the minimum value for r sc is: r sc(min) 0.25 v 3.4 a 0.0735 when configured for stepdown or voltageinverting applications, as in figures 21 and 25, the inductor will forward bias the output rectifier when the switch turns off. rectifiers with a high forward voltage drop or long turnon delay time should not be used. if the emitter is allowed to go sufficiently negative, collector current will flow, causing additional device heating and reduced conversion efficiency. figure 10 shows that by clamping the emitter to 0.5 v, the collector current will be in the range 10 m a over temperature. a 1n5822 or equivalent schottky barrier rectifier is recommended to fulfill these requirements. a bootstrap input is provided to reduce the output switch saturation voltage in stepdown and voltageinverting converter applications. this input is connected through a series resistor and capacitor to the switch emitter and is used to raise the internal 2.0 ma bias current source above v cc . an internal zener limits the bootstrap input voltage to v cc +7.0 v. the capacitor's equivalent series resistance must limit the zener current to less than 100 ma. an additional series resistor may be required when using tantalum or other low esr capacitors. the equation below is used to calculate a minimum value bootstrap capacitor based on a minimum zener voltage and an upper limit current source. c b(min) i t v 4.0 ma t on 4.0 v 0.001 t on parametric operation of the mc34163 is guaranteed over a supply voltage range of 2.5 v to 40 v. when operating below 3.0 v, the bootstrap input should be connected to v cc . figure 16 shows that functional operation down to 1.7 v at room temperature is possible. package the mc34163 is contained in a heatsinkable 16lead plastic dualinline package in which the die is mounted on a special heat tab copper alloy lead frame. this tab consists of the four center ground pins that are specifically designed to improve thermal conduction from the die to the circuit board. figures 17 and 18 show a simple and effective method of utilizing the printed circuit board medium as a heat dissipater by soldering these pins to an adequate area of copper foil. this permits the use of standard layout and mounting practices while having the ability to halve the junctiontoair thermal resistance. these examples are for a symmetrical layout on a singlesided board with two ounce per square foot of copper. applications the following converter applications show the simplicity and flexibility of this circuit architecture. three main converter topologies are demonstrated with actual test data shown below each of the circuit diagrams.
mc34163, mc33163 http://onsemi.com 10 r b l 2200 1n5822 lvi 1 + + - + current limit 8 7 6 5 4 3 2 (bottom view) + + - 16 9 10 11 12 13 14 15 0.25 v + r sc 0.075 v in 12 v c t 680 pf 1.125 v 15 k 1.25 v + 45 k feedback comparator q 1 q 2 60 c in 330 c o coilcraft lo451-a c b 0.02 v out 5.05 v/3.0 a low voltage indicator output c dly r lvi 10 k + - + thermal oscillator r s q latch + + + 2.0 ma 7.0 v + 180 m h test condition results line regulation v in = 8.0 v to 24 v, i o = 3.0 a 6.0 mv = 0.06% load regulation v in = 12 v, i o = 0.6 a to 3.0 a 2.0 mv = 0.02% output ripple v in = 12 v, i o = 3.0 a 36 mvpp short circuit current v in = 12 v, r l = 0.1 w 3.3 a efficiency, without bootstrap v in = 12 v, i o = 3.0 a 76.7% efficiency, with bootstrap v in = 12 v, i o = 3.0 a 81.2% figure 21. stepdown converter figure 22. external current boost connections for i p k ( switch ) greater than 3.4 a figure 22a. external npn switch figure 22b. external pnp saturated switch 1 + + 8 7 6 5 4 3 2 (bottom view) q 3 q 2 q 1 1 + + 8 7 6 5 4 3 2 (bottom view) q 2 q 1 + + q 3 9 10 11 12 13 14 15 16 9 10 11 12 13 14 15 16
mc34163, mc33163 http://onsemi.com 11 180 m h coilcraft lo451-a lvi 1 + + - + current limit 8 7 6 5 4 3 2 (bottom view) + + - 16 9 10 11 12 13 14 15 0.25 v r sc 0.075 v in 12 v c t 680 pf 1.125 v 15 k 1.25 v + 45 k feedback comparator q 1 q 2 60 c in 330 c o 330 v out 28 v/600 ma + 1n5822 r 2 47 k r 1 2.2 k + - + thermal oscillator r s q latch + + + 2.0 ma 7.0 v + r lvi 1.0 k l low voltage indicator output test condition results line regulation v in = 9.0 v to 16 v, i o = 0.6 a 30 mv = 0.05% load regulation v in = 12 v, i o = 0.1 a to 0.6 a 50 mv = 0.09% output ripple v in = 12 v, i o = 0.6 a 140 mvpp efficiency v in = 12 v, i o = 0.6 a 88.1% figure 23. stepup converter figure 24. external current boost connections for i p k ( switch ) greater than 3.4 a figure 24a. external npn switch figure 24b. external pnp saturated switch 1 + + 8 7 6 5 4 3 2 (bottom view) 16 9 10 11 12 13 14 15 q 3 q 2 q 1 1 + + 8 7 6 5 4 3 2 (bottom view) 16 9 10 11 12 13 14 15 q3 q 2 q 1 + +
mc34163, mc33163 http://onsemi.com 12 l 180 m h lvi 1 + + - current limit 8 7 6 5 4 3 2 (bottom view) + + - 16 9 10 11 12 13 14 15 0.25 v r sc 0.075 v in 12 v c t 470 pf 1.125 v 15 k 1.25 v + 45 k feedback comparator q 1 q 2 60 c in 330 c o v out -12 v/1.0 a + coilcraft lo451-a 1n5822 r 1 953 r 2 8.2 k r b 0.02 + - + + thermal oscillator r s q latch + + + 2.0 ma 7.0 v + c b 2200 test condition results line regulation v in = 9.0 v to 16 v, i o = 1.0 a 5.0 mv = 0.02% load regulation v in = 12 v, i o = 0.6 a to 1.0 a 2.0 mv = 0.01% output ripple v in = 12 v, i o = 1.0 a 130 mvpp short circuit current v in = 12 v, r l = 0.1 w 3.2 a efficiency, without bootstrap v in = 12 v, i o = 1.0 a 73.1% efficiency, with bootstrap v in = 12 v, i o = 1.0 a 77.5% figure 25. voltageinverting converter 1 8 7 6 5 4 3 2 figure 26. external current boost connections for i p k ( switch ) greater than 3.4 a figure 26a. external npn switch figure 26b. external pnp saturated switch + + (bottom view) 16 9 10 11 12 13 14 15 q 3 q 2 q 1 1 + + 8 7 6 5 4 3 2 (bottom view) 16 9 10 11 12 13 14 15 q 2 q 1 q 3 + +
mc34163, mc33163 http://onsemi.com 13 figure 27. printed circuit board and component layout (circuits of figures 21, 23, 25) all printed circuit boards are 2.58" in width by 1.9" in height. + + + ++ + + l c in c o r 2 r lvi c b r b v o v in c t r sc r 1 + +- + + - + mc34163 stepdown bottom view top view bottom view top view bottom view top view + + ++ l c in c o r 2 r lvi v o v in c t r sc r 1 + + - + + - + + + + mc34163 stepup + + + l c in c o r 2 c b r b v o v in c t r sc r 1 + + - + + - + + + + mc34163 voltageinverting +
mc34163, mc33163 http://onsemi.com 14 calculation stepdown stepup voltageinverting t on t off (notes 1, 2, 3) v out v f v in v sat v out v out v f v in v in v sat |v out | v f v in v sat t on ? t on t off t on t off 1 ? t on t off t on t off 1 ? t on t off t on t off 1 c t ? 32.143 10 6 ? 32.143 10 6 ? 32.143 10 6 i l(avg) i out i out t on t off 1 i out t on t off 1 i pk (switch) i l(avg) i l 2 i l(avg) i l 2 i l(avg) i l 2 r sc 0.25 i pk (switch) 0.25 i pk (switch) 0.25 i pk (switch) l v in v sat v out i l t on v in v sat i l t on v in v sat i l t on v ripple(pp) i l 1 8c o 2 (esr) 2 ? t on i out c o t on i out c o v out v ref r 2 r 1 1 v ref r 2 r 1 1 v ref r 2 r 1 1 v in v out i out d i l v ripple(pp) nominal operating input voltage. desired output voltage. desired output current. desired peaktopeak inductor ripple current. for maximum output current it is suggested that d i l be chosen to be less than 10% of the average inductor current i l(avg) . this will help prevent i pk (switch) from reaching the current limit threshold set by r sc . if the design goal is to use a minimum inductance value, let d i l = 2(i l(avg) ). this will proportionally reduce converter output current capability. maximum output switch frequency. desired peaktopeak output ripple voltage. for best performance the ripple voltage should be kept to a low value since it will directly affect line and load regulation. capacitor c o should be a low equivalent series resistance (esr) electrolytic designed for switching regulator applications. the following converter characteristics must be chosen: notes: 1. v sat saturation voltage of the output switch, refer to figures 8 and 9. notes: 2. v f output rectifier forward voltage drop. typical value for 1n5822 schottky barrier rectifier is 0.5 v. notes: 3. the calculated t on /t off must not exceed the minimum guaranteed oscillator charge to discharge ratio of 8, at the minimum notes: 3. operating input voltage. figure 28. design equations
mc34163, mc33163 http://onsemi.com 15 package dimensions pdip16 p suffix case 648c04 issue d dim min max min max millimeters inches a 0.744 0.783 18.90 19.90 b 0.240 0.260 6.10 6.60 c 0.145 0.185 3.69 4.69 d 0.015 0.021 0.38 0.53 e 0.050 bsc 1.27 bsc f 0.040 0.70 1.02 1.78 g 0.100 bsc 2.54 bsc j 0.008 0.015 0.20 0.38 k 0.115 0.135 2.92 3.43 l 0.300 bsc 7.62 bsc m 0 10 0 10 n 0.015 0.040 0.39 1.01 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 16 9 18 d g e n k c 16x a m 0.005 (0.13) t seating plane b m 0.005 (0.13) t j 16x m l a a b f t b so16w dw suffix case 751g03 issue b d 14x b 16x seating plane s a m 0.25 b s t 16 9 8 1 h x 45 m b m 0.25 h 8x e b a e t a1 a l c notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not inlcude mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable dambar protrusion shall be 0.13 total in excess of the b dimension at maximum material condition. dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 10.15 10.45 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90 0 7
mc34163, mc33163 http://onsemi.com 16 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc34163/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada

▲Up To Search▲

Price & Availability of MC34163-D

	To Download MC34163-D Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .